onnxruntime

Add Gemm op to DNNL Exectution provider (#8799)

* Implement Gemm op for DNNL execution provider

Signed-off-by: George Nash <george.nash@intel.com>

* Remove KernelRegistry and Gemm op for dnnl ep

The KernelRegistry for the dnnl execution provider only
registered a Gemm op that as best we can tell was never
actually used and also was not using the dnnl library.

We have implemented a Gemm op in the DNNL execution provider
subgraph code and thus are removing the unused Gemm op that
was in the dnnl KernelRegistry.

Signed-off-by: George Nash <george.nash@intel.com>

* Fix duplicated output and kernelshape inference

fix getcapability to make sure subgraph outputs do not have duplicates

fix kernelshape inference in pool

Signed-off-by: Wang <zhaoyang.wang@intel.com>

* Removed most dnnl specialized ifdefs from gradient_ops_test code

Re-enable GlobalAveragePoolGrad test for dnnl ep

The bugs that were exposed by the GlobalAveragePoolGrad test have
been fixed and this test no longer needs to be disabled for DNNL.

Removed the ReluGradDnnl test. We are getting the testing from the
already existing ReluGrad test.

MaxPoolGrad test no longer has specialized execution provider
enabling for DNNL execution provider. It will now run without
the extra enabling.

ConvGrad is the only test that still has dnnl specialized ifdefs
However, the ConvGrad code was not being executed by the code
unless it was listed first in the list of execution providers.

Signed-off-by: George Nash <george.nash@intel.com>

* Fix transpose issue on Gemm

On transposing square matrices, getmemoryandreshape will fail to reshape

fix by adding a bool

Signed-off-by: Wang <zhaoyang.wang@intel.com>

* Save memory space by reusing internal tensor for output

The intermediat matmul output tensor can be used as the output
tensor for the binary calculation.

Remove the unused IsAttributeSupported from the
DnnlGemmNodeCapability class since we now support all of the
Gemm attributes in our implementation.

Signed-off-by: George Nash <george.nash@intel.com>

Co-authored-by: Wang <zhaoyang.wang@intel.com>